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page 1 of 11 document no. doc-12514-2 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. figure 1. functional diagram product specification ultracmos ? spdt rf switch 5 ? 3000 mhz PE42720 features ?? harp? technology enhanced ?? high linearity ?? ctb/cso of -104 dbc ?? supports +1.8v control logic ?? low insertion loss ?? 0.7 db @ 1 ghz ?? 0.8 db @ 2 ghz ?? 1.0 db @ 3 ghz ?? high isolation ?? 65 db @ 1 ghz ?? 64 db @ 2 ghz ?? 63 db @ 3 ghz ?? high esd performance ?? 2500v hbm on all pins ?? 500v cdm on all pins product description the PE42720 is a harp? technology-enhanced absorptive 75 ? spdt rf switch developed on the ultracmos ? process technology. PE42720 is a highly linear device delivering high isolation and low insertion loss performance. it is designed for catv applications including catv signal switching and distribution, cable modem headend, and dbs if switching. PE42720 supports +1.8v control logic and offers high esd protection. in addition, no blocking capacitors are required if dc voltage is not present on the rf ports. peregrine?s harp? technology enhancement is an innovative feature of the ultracmos ? process, offering the performance of gaas with the economy and integration of conventional cmos. figure 2. package type 20-lead 4x4 mm lga doc-35206
product specification PE42720 page 2 of 11 document no. doc-12514-2 ultracmos ? rfic solutions ?2010-2013 peregrine semiconductor corp. all rights reserved. table 1. electrical specifications @ 25c, v dd = 3.0v (z s = z l = 75 ? ) notes: 1. the input 1db compression point is a linearity figure of merit. refer to table 3 for the rf input power p in 2. measured in a 50 ? system 3. measured with a 3 ns rise time, 0/3v pulse and 500 mhz bandwidth parameter path condition min typ max unit operating frequency 5 3000 mhz insertion loss rfc?rfx 5?100 mhz 100?1000 mhz 1000?2000 mhz 2000?3000 mhz 0.6 0.7 0.8 1.0 0.8 0.9 1.0 1.3 db db db db isolation rfx?rfx 5?100 mhz 100?1000 mhz 1000?2000 mhz 2000?3000 mhz 68 63 60 58 70 65 62 60 db db db db isolation rfc?rfx 5?100 mhz 100?1000 mhz 1000?2000 mhz 2000?3000 mhz 68 63 62 61 70 65 64 63 db db db db return loss all ports 5?2500 mhz 2500?3000 mhz 20 14 db db input 1 db compression point 1,2 rfc?rfx all bands, 100% duty cycle 30 31 dbm ctb / cso 159 channels; 42 dbmv per channel output power -104 dbc video feedthrough 3 dc measurement 5 mv pp switching time 50% ctrl to 90% or 10% rf 1500 2100 ns
product specification PE42720 page 3 of 11 document no. doc-12514-2 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. pin # pin name description 1, 2, 4-7, 9, 10-12, 14, 15, 18, 19 gnd ground 3 rf1 1 rf port 8 rfc 1 rf common 13 rf2 1 rf port 16 ctrl2 digital control logic input 2 17 ctrl1 digital control logic input 1 20 v dd supply voltage pad gnd exposed pad: ground for proper operation table 2. pin descriptions table 4. absolute maximum ratings parameter/condition symbol min max unit supply voltage v dd -0.3 5.5 v digital input voltage (ctrl1, ctrl2) v ctrl -0.3 3.6 v rf input power (rfc?rfx) 1 p in 28 dbm rf input power into terminated ports (rfx) 1 p in,term 20 dbm storage temperature range t st -65 +150 c esd voltage hbm 2 , all pins v esd,hbm 2500 v esd voltage mm 3 , all pins v esd,mm 150 v esd voltage cdm 4 , all pins v esd,cdm 500 v notes: 1. 100% duty cycle, all bands, 75 ? 2. human body model (mil-std 883 method 3015) 3. machine model (jedec jesd22-a115) 4. charged device model (jedec jesd22-c101) figure 3. pin configuration (top view) note 1: rf pins 3, 8, and 13 must be at 0v dc. the rf pins do not require dc blocking capacitors for proper oper ation if the 0v dc requirement is met exceeding absolute maximum ratings may cause permanent damage. operation should be restricted to the limits in the operating ranges table. operation between operating range maximum and absolute maximum for extended periods may reduce reliability. table 3. operating ranges parameter symbol min typ max unit supply voltage v dd 2.7 5.5 v supply current v dd = 2.7 to 5.5v i dd 130 200 a digital input high (ctrl1, ctrl2) v ih 1.17 3.6 v digital input low (ctrl1, ctrl2) v il -0.3 0.6 v digital input current i ctrl 9 12 a rf input power (rfc?rfx) 1 p in 28 dbm rf input power into terminated ports (rfx) 1 p in,term 20 dbm operating temperature range t op -40 +85 c note 1: 100% duty cycle, all bands, 75 ?
product specification PE42720 page 4 of 11 document no. doc-12514-2 ultracmos ? rfic solutions ?2010-2013 peregrine semiconductor corp. all rights reserved. electrostatic discharge (esd) precautions when handling this ultracmos ? device, observe the same precautions that you would use with other esd-sensitive devices. although this device contains circuitry to protect it from damage due to esd, precautions should be taken to avoid exceeding the specified rating. latch-up avoidance unlike conventional cmos devices, ultracmos ? devices are immune to latch-up. table 5. truth table moisture sensitivity level the moisture sensitivity level rating for the PE42720 in the 20-lead 4x4 mm lga package is msl3. note 1: ctrl1 = high and ctrl2 = high are not supported ctrl1 ctrl2 rfc ? rf1 rfc ? rf2 low low off off low high off on high low on off high high n/a 1 n/a 1 switching frequency the PE42720 has a maximum 25 khz switching rate. switching frequency describes the time duration between switching events. switching time is the time duration between the point the control signal reaches 50% of the final value and the point the output signal reaches within 10% or 90% of its target value. switching time is provided in table 1 . spurious performance the typical spurious performance of the PE42720 is ?155 dbm.
product specification PE42720 page 5 of 11 document no. doc-12514-2 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. typical performance data @ 25c and v dd = 3.0v unless otherwise specified figure 4. insertion loss (rfc?rfx) figure 5. insertion loss vs. temp (rfc?rfx) figure 7. rfc port return loss vs. temp (rf1 active) figure 6. insertion loss vs. v dd (rfc?rfx) figure 8. rfc port return loss vs. v dd (rf1 active)
product specification PE42720 page 6 of 11 document no. doc-12514-2 ultracmos ? rfic solutions ?2010-2013 peregrine semiconductor corp. all rights reserved. typical performance data @ 25c and v dd = 3.0v unless otherwise specified figure 9. rfc port return loss vs. temp (rf2 active) figure 13. active port return loss vs. temp (rf2 active) figure 12. active port return loss vs. v dd (rf1 active) figure 10. rfc port return loss vs. v dd (rf2 active) figure 14. active port return loss vs. v dd (rf2 active) figure 11. active port return loss vs. temp (rf1 active)
product specification PE42720 page 7 of 11 document no. doc-12514-2 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. typical performance data @ 25c and v dd = 3.0v unless otherwise specified figure 15. isolation vs. temp (rfx?rfx) figure 17. isolation vs. temp (rfc?rfx) figure 16. isolation vs. v dd (rfx?rfx) figure 18. isolation vs. v dd (rfc?rfx)
product specification PE42720 page 8 of 11 document no. doc-12514-2 ultracmos ? rfic solutions ?2010-2013 peregrine semiconductor corp. all rights reserved. figure 19. evaluation board layout evaluation kit the spdt switch evaluation board was designed to ease customer evaluation of peregrine?s PE42720. the rf common port is connected through a 75 ? transmission line via the f-type connector, j2. rf1 and rf2 ports are connected through 75 ? transmission lines via f-type connectors j1 and j3, respectively. a 75 ? through transmission line is available via f-type connectors j4 and j5, which can be used to de-embed the loss of the pcb. j6 provides dc and digital inputs to the device. the board is constructed of a four metal layer material with a total thickness of 60 mils. to achieve high isolation, the 75 ? transmission lines are designed in layer 2 using a stripline waveguide design. the board stack up for 75 ? transmission lines has 20 mil thickness of rogers 4350b between layer 1 and layer 2, 20 mil thickness of rogers 4450f between layer 2 and layer 3, and 13.3 mil thickness of rogers 4350b between layer 3 and layer 4. for the true performance of the PE42720 to be realized, the pcb should be designed in such a way that rf transmission lines and sensitive dc i/o traces are heavily isolated from one another. 101-0557
product specification PE42720 page 9 of 11 document no. doc-12514-2 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. figure 20. evaluation board schematic doc-12527
product specification PE42720 page 10 of 11 document no. doc-12514-2 ultracmos ? rfic solutions ?2010-2013 peregrine semiconductor corp. all rights reserved. top view bottom view side view recommended land pattern a 0.10 c (2x) c 0.10 c 0.08 c seating plane b 0.10 c (2x) pin #1 corner 4.00 4.00 0.940.07 0.700.04 2.000.05 2.000.05 0.400.05 (x20) 0.260.05 (x20) 0.50 0.10 2.00 ref (x16) 0.31 (x20) 0.60 (x20) 2.05 2.05 4.20 4.20 0.50 (x16) 1 5 6 10 11 15 16 20 figure 21. package drawing 20-lead 4x4 mm lga figure 22. top marking specifications 42720 yyww zzzzz doc-01641 doc-01890 = pin 1 designator yyww = date code zzzzz = last five digits of lot number
product specification PE42720 page 11 of 11 document no. doc-12514-2 www.psemi.com ?2010-2013 peregrine semiconductor corp. all rights reserved. notes: 1. 10 sprocket hole pitch cumulative tolerance 0.02 2. camber not to exceed 1 mm in 100 mm 3. material: ps + c 4. ao and bo measured as indicated 5. ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier 6. pocket position relative to sprocket hole measured as true position of pocket, not pocket hole ao = 4.35 mm bo = 4.35 mm ko = 1.1 mm tape feed direction figure 23. tape and reel drawing table 6. ordering information order code description package shipping method PE42720lgbb-z PE42720 spdt rf switch green 20-lead 4x4 mm lga 3000 units/t&r ek42720-02 PE42720 evaluation kit evaluation kit 1/box advance information : the product is in a formative or design stage. the datasheet contains design target specifications for product development. specifications and features may change in any manner without notice. preliminary specification: the datasheet contains preliminary data. additional data may be added at a later date. peregrine reserves the right to change specifications at any time without notice in order to supply the best possible product. product specification: the datasheet contains final data. in the event peregrine decides to change the specifications, peregrine will notify customers of the intended changes by issuing a cnf (customer notification form). the information in this datasheet is believed to be reliable. however, peregrine assumes no liability for the use of this information. use shall be entirely at the user?s own risk. no patent rights or licenses to any circuits described in this datasheet are implied or granted to any third party. peregrine?s products are not designed or intended for use in devices or systems intended for surgical implant, or in other applications intended to support or sustain life, or in any application in which the failure of the peregrine product could create a situation in which personal injury or death might occur. peregrine assumes no liability for damages, including consequential or incidental damages, arising out of the use of its products in such applications. the peregrine name, logo, ultracmos and utsi are registered trademarks and harp, multiswitch and dune are trademarks of peregrine semiconductor corp. sales contact and information for sales and contact information please visit www.psemi.com .

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